发明名称 |
Method for Forming a Notched Gate Insulator for Advanced MIS Semiconductor Devices and Devices Thus Obtained |
摘要 |
Methods of providing a semiconductor device with a control electrode structure having a controlled overlap between control electrode and first and second main electrode extensions without many spacers are disclosed. A preferred method provides a step of etching back an insulating layer performed after amorphizing and implanting the main electrode extensions. Preferably, the step that amorphizes the extensions also partly amorphizes the insulating layer. Because etch rates of amorphous insulator and crystalline insulator differ, the amorphized portion of the insulating layer may serve as a natural etch stop to enable even better fine-tuning of the overlap. Corresponding semiconductor devices are also provided. |
申请公布号 |
US2011309457(A1) |
申请公布日期 |
2011.12.22 |
申请号 |
US201113167648 |
申请日期 |
2011.06.23 |
申请人 |
HENSON KIRKLEN;SURDEANU RADU CATALIN;KONINKIIJKE PHILIPS ELECTRONICS N.V.;INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC) |
发明人 |
HENSON KIRKLEN;SURDEANU RADU CATALIN |
分类号 |
H01L29/772;H01L21/265;H01L29/423;H01L29/49;H01L29/78 |
主分类号 |
H01L29/772 |
代理机构 |
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代理人 |
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地址 |
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