发明名称 FAULT TESTING FOR INTERCONNECTIONS
摘要 Embodiments of the invention are generally directed to fault testing for interconnections. An embodiment of a fault analysis apparatus includes a test pattern source to provide a test pattern for an interconnection between a transmitter and a receiver, the interconnection having a transmitter end and a receiver end, the interconnection including a first wire and a second wire, the transmitter transmitting the test pattern on the first wire to the receiver. The apparatus further includes a first switch to open and close a first connection for the first wire, and a second switch to open and close a second connection for the second wire. The first switch and the second switch are to be set according to a configuration to set at least a portion of a test path for the detection of one or more faults in the interconnection.
申请公布号 KR20110136795(A) 申请公布日期 2011.12.21
申请号 KR20117019510 申请日期 2010.01.22
申请人 SILICON IMAGE, INC. 发明人 SUL CHINSONG;AHN, GI JUNG
分类号 G01R31/317 主分类号 G01R31/317
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