发明名称 TERMINATION CIRCUIT FOR ON-DIE TERMINATION
摘要 <p>In a semiconductor device having a terminal connected to an internal portion, a termination circuit for providing on-die termination for the terminal of the device. The termination circuit comprises a plurality of transistors, including at least one NMOS transistor and at least one PMOS transistor, connected between the terminal and a power supply; and control circuitry for driving a gate of each of NMOS transistor with a corresponding NMOS gate voltage and for driving a gate of each PMOS transistor with a corresponding PMOS gate voltage, the control circuitry being configured to control the NMOS and PMOS gate voltages so as to place the transistors in an ohmic region of operation when on-die termination is enabled. The power supply supplies a voltage that is less than each said NMOS gate voltage and greater than each said PMOS gate voltage.</p>
申请公布号 EP2396885(A1) 申请公布日期 2011.12.21
申请号 EP20100740862 申请日期 2010.01.11
申请人 MOSAID TECHNOLOGIES INCORPORATED 发明人 GILLINGHAM, PETER, B.
分类号 H03K19/00;H03K19/003;H04L25/02 主分类号 H03K19/00
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