发明名称 CONFIGURATION AND FABRICATION OF SEMICONDUCTOR STRUCTURE IN WHICH SOURCE AND DRAIN EXTENSIONS OF FIELD-EFFECT TRANSISTOR ARE DEFINED WITH DIFFERENT DOPANTS
摘要 An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is defined with dopant of higher atomic weight than the lateral extension of the drain.
申请公布号 KR20110135978(A) 申请公布日期 2011.12.20
申请号 KR20117025424 申请日期 2010.03.25
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 BAHL SANDEEP R.;FRENCH WILLIAM D.;BULUCEA CONSTANTIN
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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