发明名称 Automatic scrambling of input/output data according to row addresses in a semiconductor memory device
摘要 A semiconductor memory device is capable of scrambling input/output data according to row addresses. The semiconductor memory device includes a local line driving block configured to differentially drive a positive local line and a negative local line by selectively inverting data on a global line according to row addresses, a global line driving block configured to drive the global line by selectively inverting data on the positive local line and data on the negative local line according to the row addresses, a first cell region configured to allow a first internal data to be equalized with the data on the positive local line in response to the row addresses and column addresses, and a second cell region configured to allow a second internal data to be equalized with the data on the negative local line in response to the row addresses and the column addresses.
申请公布号 US8081534(B2) 申请公布日期 2011.12.20
申请号 US20090490630 申请日期 2009.06.24
申请人 KIM SEUNG-BONG;HYNIX SEMICONDUCTOR INC. 发明人 KIM SEUNG-BONG
分类号 G11C8/00 主分类号 G11C8/00
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