| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a phase difference detection circuit, a constant delay time frequency divider circuit, and a phase synchronization circuit which can accurately suppress phase (timing) variation of an output signal in a higher frequency. <P>SOLUTION: A phase difference detection circuit includes a fractional pulse width output divider (1), which divides frequency of an input signal by N and generates an output signal whose pulse width is B times as a period of the input signal, where N is an arbitrary integer and B is defined as a real number but an integer satisfying relation of 0<B<N; an arithmetic circuit (2) to generate an exclusive-OR signal from the input signal and the output signal; and a low-pass filter (3) to pass a signal with low-frequency component lower than the exclusive-OR signal by a specific frequency therethrough, and to output a value corresponding to a time delay of the output signal against the input signal as a phase difference detection signal. <P>COPYRIGHT: (C)2012,JPO&INPIT |
