| 摘要 |
<P>PROBLEM TO BE SOLVED: To test a computer with efficient and advance restraint on the occurrence of exception interrupt and interrupt processing. <P>SOLUTION: A computer, when preparing an instruction string for test use, designates the output destination of instructions from a register other than an input-dedicated register into which execution results are not written. Also the computer, when preparing an instruction string for test use, designates for inputting of any instruction that may give rise to exception interrupt, such as floating point calculation or fixed point division, the input-dedicated register into which execution results are not written. The computer then sets as initial values for the input-dedicated register values that can prevent exception interrupt from occurring and executes the instruction string for test use, thereby conducting an operation test without allowing any exception interrupt to occur. <P>COPYRIGHT: (C)2012,JPO&INPIT |
