发明名称 REDUCING POWER CONSUMPTION IN CLOCK AND DATA RECOVERY SYSTEMS
摘要 Some embodiments provide a clock and data recovery (CDR) system to recover clock and data information from an analog signal. The CDR system may include an integral path and a proportional path that are part of an integral-proportional control loop. The integral path may be used to track frequency changes in a clock signal that is embedded in the analog signal, while the proportional path may be used to track phase changes in the clock signal that is embedded in the analog signal. The proportional path may be executed at a first clock frequency, while the integral path may be executed at a second clock frequency that is lower than the first clock frequency to reduce the power consumption of the CDR system.
申请公布号 US2011307722(A1) 申请公布日期 2011.12.15
申请号 US20100797411 申请日期 2010.06.09
申请人 FLYNN JAMES P.;STONICK JOHN T.;WEINLADER DANIEL K.;WEN JIANPING;WOLFER SKYE;YOKOYAMA-MARTIN DAVID A.;SYNOPSYS, INC. 发明人 FLYNN JAMES P.;STONICK JOHN T.;WEINLADER DANIEL K.;WEN JIANPING;WOLFER SKYE;YOKOYAMA-MARTIN DAVID A.
分类号 G06F1/00;H03L7/00 主分类号 G06F1/00
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