发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device including a test signal generation circuit for resetting a test circuit where a test mode is erroneously set when power is supplied. <P>SOLUTION: A test signal generation circuit 100 shifts a test enable signal TESTE from an L level to an H level so as to activate a test circuit, and shifts the test enable signal TESTE from an H level to an L level so as to deactivate the test circuit. When a test mode entry signal ENTESTB is shifted from an H level to an L level, the test enable signal TESTE is shifted from an L level to an H level. When the test mode entry signal ENTESTB is shifted to an H level after a predetermined prescribed period elapses after the test enable signal TESTE is shifted to an H level, the test enable signal TESTE is shifted from an H level to an L level. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011252801(A) 申请公布日期 2011.12.15
申请号 JP20100126944 申请日期 2010.06.02
申请人 ELPIDA MEMORY INC 发明人 OKUNO SHINYA;FURUYA KIYOHIRO
分类号 G01R31/28;G01R31/3185;G06F1/24;G06F1/26;H01L21/822;H01L27/04 主分类号 G01R31/28
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