发明名称 |
FERROELECTRIC MEMORIES BASED ON ARRAYS OF AUTONOMOUS MEMORY BITS |
摘要 |
A memory having a plurality of ferroelectric memory cells connected between first and second bit lines is disclosed. A read circuit is also connected between the first and second bit lines. A word select circuit selects one of the ferroelectric memory cells and generates a potential on the first bit line indicative of a value stored in the selected one of the plurality of ferroelectric memory cells. Each ferroelectric memory cell includes a ferroelectric capacitor and a variable impedance element having an impedance between first and second switch terminals that is determined by a signal on a control terminal. The ferroelectric capacitor is connected between the control terminal and the first switch terminal. First and second gates connect the ferroelectric memory cell to the bit lines in response to the word select circuit selecting that ferroelectric memory cell. |
申请公布号 |
WO2011156525(A2) |
申请公布日期 |
2011.12.15 |
申请号 |
WO2011US39677 |
申请日期 |
2011.06.08 |
申请人 |
RADIANT TECHNOLOGIES, INC.;EVANS, JOSEPH, TATE |
发明人 |
EVANS, JOSEPH, TATE |
分类号 |
G11C11/22;G11C7/10;G11C8/08 |
主分类号 |
G11C11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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