| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device that increases the allowable number of fail bits in a writing operation while speeding up the writing operation. <P>SOLUTION: A nonvolatile semiconductor memory device includes: a memory cell array 5 in which a plurality of memory cells are disposed; a write control circuit 16 for performing a program operation and a verification operation on every page with respect to the memory cell array 5; latch circuits 10 and 12 for holding verification result data; an address control circuit 15 for dividing pages into a plurality of regions and sequentially selecting an address of each region; a scan control circuit 14 for performing a scanning operation so as to determine whether or not the number of fail bits is equal to or less than the allowable number of fail bits by counting the number of fail bits in accordance with the verification result data held in the latch circuits 10 and 12 for each region selected by the address control circuit 15; and an address latch circuit 20 for holding addresses of no-fail regions where the number of fail bits is 0 (zero) out of the plurality of regions. <P>COPYRIGHT: (C)2012,JPO&INPIT |
