发明名称 VITERBI DECODER WITH A CHANNEL FOR EVALUATING THE CURRENT SIGNAL-TO-NOISE RATIO
摘要 A Viterbi decoder with a channel for evaluating the current signal-to-noise ratio which comprises, connected in series, a branch metrics calculation unit, a path metrics calculation and memory unit, a unit for generating an information symbol, and the following elements which are coupled to the path metrics calculation and memory unit: a minimal path metrics memory, a path metrics memory and a path memory, wherein the input of the device is the input of the branch metrics calculation unit, and the output of the device is the output of the unit for generating an information symbol, said Viterbi decoder being characterized in that it comprises, connected in series: a unit for evaluating the depth of decoding history at which all of the decoding paths converge, a unit for evaluating the signal-to-noise ratio, wherein the input of the unit for evaluating the depth of decoding history at which all of the decoding paths converge is connected to the second output of the path memory, while the first output of the unit for evaluating the signal-to-noise ratio is connected to the first control input of the branch metrics calculation unit and to the control input of the path metrics calculation and memory unit, the second output of the unit for evaluating the signal-to-noise ratio is connected to the second control input of the branch metrics calculation unit and is the output of the device at which, during operation of said device, a signal occurs which corresponds to an evaluation of the current signal-to-noise ratio. In addition, the unit for evaluating the depth of decoding history at which all of the decoding paths converge can be in the form of combinational logic units in a number which is equal to the decoding depth, while the number of inputs of each unit is equal to the number of convolutional encoder states, and a priority encoder with a number of inputs equal to the number of combinational logic units, wherein the output of each combinational logic unit is connected to the corresponding input of the priority encoder, and the input of the unit for evaluating the depth of decoding history at which all of the decoding paths converge serves as the inputs of the combinational logic units, while the output is the output of the priority encoder.
申请公布号 WO2011155863(A1) 申请公布日期 2011.12.15
申请号 WO2010RU00420 申请日期 2010.07.28
申请人 KELIN, TIMUR GEORGIEVICH;VAZHENIN, NIKOLAY AFANASIEVICH;PYATKOV, DMITRY ALEKSEEVICH 发明人 KELIN, TIMUR GEORGIEVICH;VAZHENIN, NIKOLAY AFANASIEVICH;PYATKOV, DMITRY ALEKSEEVICH
分类号 H03M13/23 主分类号 H03M13/23
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