发明名称 A MULTI-BIT SIGMA-DELTA MODULATOR WITH REDUCED NUMBER OF BITS IN FEEDBACK PATH
摘要 <p>A sigma-delta modulator (200) for an ADC, passes an input signal to a loop filter (20), then to a multi-bit quantiser (30) of the modulator (200). An output of the quantiser (30) is passed to a digital filter (50), and a feedback signal is passed back to the loop filter (20), the feedback signal having fewer bits than are produced by the multi-bit quantiser (30). The difference in gain of the digital filter (50) inside and outside of a passband of the sigma-delta modulator (200) is greater than or equal to 20log 10 ((2 y -1)/(2 z -1)) dB, where y is the number of bits of the feedback signal and z is the number of bits of the multi-bit quantiser (30).</p>
申请公布号 EP2229734(B1) 申请公布日期 2011.12.14
申请号 EP20080862503 申请日期 2008.12.16
申请人 ST-ERICSSON SA 发明人 VAN VELDHOVEN, ROBERT, HENRIKUS, MARGARETHA
分类号 H03M3/02;H03M3/04 主分类号 H03M3/02
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