Delay variation analysis apparatus and delay variation calculation method

摘要

A method for analyzing a delay time distribution of an N-stage circuit. The method includes a delay time calculation step of calculating maximum deviation delay time of a signal propagating through the circuit and basic delay time of the circuit, a delay variation calculation step of calculating a delay variation value of the N-stage circuit by using the mean square of differences between the maximum deviation delay time of the circuit and the basic delay time of the circuit taken over the N stages, and a step of generating the delay time distribution of the N-stage circuit as a normal distribution by using the calculated delay variation value.