| 摘要 |
A fully differential amplifier circuit according to one embodiment includes a first section for generating first and second output signals on first and second outputs from first and second input signals; a first feedback loop coupled to the first section, the first feedback loop including a second section for adjusting the first output signal towards a common mode voltage level, and for reducing an offset voltage of the first output signal; a second feedback loop coupled to the first section, the second feedback loop including a third section for adjusting the second output signal towards the common mode voltage level, and for reducing an offset voltage of the second output signal; and a filter section positioned on the first and second feedback loops between outputs of the second and third sections and the first section. |
