发明名称 Method of fabricating a deep trench insulated gate bipolar transistor
摘要 In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping concentration that is substantially constant in a vertical direction down to the buffer layer. A pair of spaced-apart trenches is formed in the epitaxial layer from a top surface of the epitaxial layer down at least into the buffer layer. A dielectric material is formed in the trenches over the first and second sidewall portions. Source/collector and body regions of are formed at the top of the epitaxial layer, the body region separating the source/collector region of the pillar from a drift region of the epitaxial layer that extends from the body region to the buffer layer. An insulated gate member is then formed in each of the trenches adjacent to and insulated from the body region.
申请公布号 US8076723(B2) 申请公布日期 2011.12.13
申请号 US20110930626 申请日期 2011.01.11
申请人 PARTHASARATHY VIJAY;BANERJEE SUJIT;POWER INTEGRATIONS, INC. 发明人 PARTHASARATHY VIJAY;BANERJEE SUJIT
分类号 H01L29/76 主分类号 H01L29/76
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