发明名称 SRAM device
摘要 An SRAM device including a memory cell, the memory cell having two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a field effect transistor having a standing semiconductor thin plate, a logic signal input gate and a bias voltage input gate, the gates sandwiching the semiconductor thin plate and being electrically separated from each other, a first bias voltage is applied to bias voltage input gates of the transistors of the memory cells in a row including a memory cell being accessed for reading or writing, and a second bias voltage is applied to the bias voltage input gates of the transistors of the memory cells in a row including a memory cell under memory holding operation.
申请公布号 US8077510(B2) 申请公布日期 2011.12.13
申请号 US20070517696 申请日期 2007.12.06
申请人 OUCHI SHINICHI;LIU YONGXUN;MASAHARA MEISHOKU;MATSUKAWA TAKASHI;ENDO KAZUHIKO;NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCEAND TECHNOLOGY 发明人 OUCHI SHINICHI;LIU YONGXUN;MASAHARA MEISHOKU;MATSUKAWA TAKASHI;ENDO KAZUHIKO
分类号 G11C11/34;G11C11/00 主分类号 G11C11/34
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