发明名称 Variable feature interface that induces a balanced stress to prevent thin die warpage
摘要 A packaged semiconductor product includes a packaging substrate coupled to a semiconductor die through an interconnect structure with elements of variable features. The interconnect structure may be bumps or pillars. The variable features of the interconnect structure induce a reverse bend on the semiconductor die that mitigates warpage of the semiconductor die during semiconductor assembly by balancing bending of the packaging substrate during reflow. The variable features can be variable height and/or variable composition.
申请公布号 US8076762(B2) 申请公布日期 2011.12.13
申请号 US20090540586 申请日期 2009.08.13
申请人 CHANDRASEKARAN ARVIND;RADOJCIC RATIBOR;QUALCOMM INCORPORATED 发明人 CHANDRASEKARAN ARVIND;RADOJCIC RATIBOR
分类号 H01L23/52 主分类号 H01L23/52
代理机构 代理人
主权项
地址