| 摘要 |
A three phase symmetric sequence shaper with adjustable pulses length comprises two reversible counter-down counters each of which has clock input, parallel load enable input and loading data inputs, counter mode enable input, asynchronous reset input, overflow input, inverter, first and second elements OR, a circuit comprising in series connected resistor and capacitor, a start-stop device comprising synchronous D flip-flop with asynchronous reset, first and second AND elements. Second inverter, two JK flip-flops having by two input J and K , asynchronous reset input, third, fourth and fifth AND elements are incorporated, outputs of which form outputs of the shaper – outputs of three-phase periodic pulse sequence. |
