发明名称 Semiconductor device including memory cells that require refresh operation
摘要 A semiconductor device includes a first circuit that generates a self refresh signal in a predetermined cycle asynchronous with a cycle set externally, a second circuit that generates a refresh address in response to the self refresh signal and updates the refresh address and outputs the refresh address, a third circuit that retains a relief address, a fourth circuit that counts number of generation of the self refresh signal and activates an interrupt signal when a count of the number of generation reaches a predetermined count, a fifth circuit that specifies the refresh address when the interrupt signal is in an inactive state and specifies the relief address when the interrupt signal is in an active state, and a sixth circuit that performs a refresh operation on memory cells specified by the selected refresh address or the relief address. The second circuit temporarily stops updating the refresh address in response to activation of the interrupt signal.
申请公布号 US2011299352(A1) 申请公布日期 2011.12.08
申请号 US201113067329 申请日期 2011.05.25
申请人 FUJISHIRO KEISUKE;KAMISAKI SACHIKO;ELPIDA MEMORY, INC. 发明人 FUJISHIRO KEISUKE;KAMISAKI SACHIKO
分类号 G11C11/402 主分类号 G11C11/402
代理机构 代理人
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