发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of suppressing write disturbance without increasing area of a cell array. <P>SOLUTION: A semiconductor memory device comprises a memory cell array 100 in which a plurality of memory cells each having a two-terminal type memory element R and a selection transistor Q connected in series are arranged in a matrix; a first voltage application circuit 101 for applying a rewriting voltage pulse to a first bit line; and a second voltage application circuit 102 for applying precharge voltage to a first and a second bit lines. In the semiconductor memory device, at a time of rewriting a memory cell, after the second voltage application circuit 102 precharges both ends of the memory cell to the same voltage in advance, the first voltage application circuit 101 applies the rewriting voltage pulse through the first bit line directly connected to the selection transistor, and the second voltage application circuit 102 applies the precharge voltage to the second bit line connected directly to the memory element. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011248953(A) 申请公布日期 2011.12.08
申请号 JP20100119948 申请日期 2010.05.26
申请人 SHARP CORP 发明人 ISHIHARA KAZUYA;NAGURA MITSURU;OTA YOSHIJI
分类号 G11C13/00;H01L21/8246;H01L27/10;H01L27/105 主分类号 G11C13/00
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