发明名称 |
PACKET TRANSFER DEVICE CONTROL METHOD AND CONTROLLER |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a packet transfer device control method and its controller that can reduce the power consumption of a packet transfer device by appropriately determining a predictive input bandwidth. <P>SOLUTION: A packet transfer device including a plurality of packet processing circuits controls operations of the packet processing circuits. This method comprises: a first step of storing an information history of packets input and output into and from the packet transfer device within a unit time; a second step of calculating an input bandwidth of packets input into the packet transfer device in each unit time on the basis of the packet information history; a third step of calculating the number of packets stored in a queue of the packet transfer device in each unit time on the basis of the packet information history; a forth step of setting up control information of processing performance for a packet processing circuit to be operated depending on the input bandwidth for a unit time and the number of packets per unit time; and a fifth step of controlling operations of the packet processing circuits on the basis of the set control information. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2011250237(A) |
申请公布日期 |
2011.12.08 |
申请号 |
JP20100122446 |
申请日期 |
2010.05.28 |
申请人 |
HITACHI LTD |
发明人 |
HIDAKA MINORU;YAZAKI TAKEKI |
分类号 |
H04L13/08;H04L12/811;H04L12/931;H04L12/939;H04L29/08 |
主分类号 |
H04L13/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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