| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a test method of semiconductor device which reflects possibility of having potential defect in test result of a bit line pair which can be a defect, and the semiconductor device. <P>SOLUTION: A semiconductor device which comprises a first and second memory cell mat which have multiple memory cells arranged at each point where multiple word lines and multiple bit lines intersect, and a sense amplifier which amplifies potential difference of a bit line pair made up of a bit line within a first memory cell mat and a bit line within a second memory cell mat comprises: a determination circuit where test is performed in order for each memory cell whether multiple memory cells arranged in the bit line pair are defects or not; a counter circuit which receives the test result for each test performed and counts the number of test results which indicate defect, and a test output circuit which outputs all test results performed after the count number reaches a predetermined number as defects when the count number reaches the predetermined number or more. <P>COPYRIGHT: (C)2012,JPO&INPIT |
