| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a mechanism capable of suitably resetting the whole of a plurality of circuit blocks while reducing peak current consumption of the whole of a plurality of circuit blocks. <P>SOLUTION: A clock supply device 1, which supplies a plurality of circuit blocks A2-D5 with clock, supplies the circuit blocks A2-D5 with a clock signal having a predetermined active edge phase during normal operation of the circuit blocks A2-D5 and supplies each of the circuit blocks A2-D5 with clock signals having different active edge phases during reset operation of the circuit blocks A2-D5. <P>COPYRIGHT: (C)2012,JPO&INPIT |
