| 摘要 |
A physical layer device including a plurality of ports and a clock synchronization module. Each port of the plurality of ports is programmable to receive a grandmaster clock. The clock synchronization module is configured to i) receive the grandmaster clock from a first port of the plurality of ports (wherein the first port has been programmed to receive the grandmaster clock), and ii) clean up the grandmaster clock, wherein cleaning up the grandmaster clock includes one or more of removing jitter from the grandmaster clock, controlling a voltage swing or the grandmaster clock, or establishing fixed edge rates of the grandmaster clock. Other ones of the plurality of ports, not including the first port, are programmed to receive the cleaned up grandmaster clock for use when transmitting data.
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