| 摘要 |
PURPOSE: A semiconductor integrated circuit is provided to increase layout margin of a memory chip by reducing the number of global lines. CONSTITUTION: An impedance control signal generating block(200) transmits a first impedance control signal and a second impedance control signal at different time through the same signal line. An input and output block(300) inputs and outputs data with set impedance by receiving the first impedance control signal and the second impedance control signal according to corresponding transmission time. A timing control signal generating unit generates a timing control signal in response to an impedance control signal. A multiplexing unit generates a multiplexing signal by multiplexing the first impedance control signal and the second impedance control signal according to the impedance control signal and the timing control signal.
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