发明名称 Seed generating circuit, random number generating circuit, semiconductor integrated circuit, IC card, and information terminal equipment
摘要 A random number generating circuit comprises: the seed generating circuit which generates a seed; and a pseudo random number circuit which generates pseudo random numbers based on the seed generated by the seed generating circuit. The seed generating circuit has: an oscillating circuit which oscillates continuously or intermittently, and which outputs a digital data sequence; a smoothing circuit which outputs time series data by controlling appearance frequencies of “0” and “1” in the digital data sequence outputted from the oscillating circuit; and a postprocessing circuit which generates one-bit seed by a computation using a plurality of bits included in the time series data.
申请公布号 US8073889(B2) 申请公布日期 2011.12.06
申请号 US20080153410 申请日期 2008.05.19
申请人 FUJITA SHINOBU;IWAMURA TETSURO;KABUSHIKI KAISHA TOSHIBA 发明人 FUJITA SHINOBU;IWAMURA TETSURO
分类号 G06F7/02;G06F7/58;G09C1/00;H03K3/84 主分类号 G06F7/02
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