发明名称 Simultaneous sampling analog to digital converter
摘要 The invention is a novel scheme of performing an analog to digital conversion of simultaneous sampled analog inputs using multiple sample and hold circuits and a single successive approximation analog to digital converter (“SAR ADC”). Each of the analog inputs are stored on capacitors in the sample and hold circuits, and the sample and holds are sequentially connected to the capacitor DAC. After the digital conversion of the of the input signals stored on a sample and hold, the connected sample and hold is disconnected and the charge on the DAC is reset before the next sample and hold circuit is connected. The process is repeated until all analog inputs have been converted.
申请公布号 US8072360(B2) 申请公布日期 2011.12.06
申请号 US20090645807 申请日期 2009.12.23
申请人 BYRNE EAMONN;BRANNICK PARAIC;KEARNEY PAUL;ANALOG DEVICES, INC. 发明人 BYRNE EAMONN;BRANNICK PARAIC;KEARNEY PAUL
分类号 H03M1/06 主分类号 H03M1/06
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