发明名称 Circuit and method for dynamic in-rush current control in a power management circuit
摘要 Disclosed are a circuit and a method for controlling dynamic in-rush current in a power management circuit. The circuit includes a current limiting unit having a first quantity of sleep mode devices. A voltage drop minimization unit is coupled to the current limiting unit and has a second quantity of sleep mode devices. The second quantity of sleep mode devices is greater than the first quantity of sleep mode devices. A sequential enabling unit is coupled to both the current limiting unit and the voltage drop minimization unit. The sequential enabling unit is configured to turn on the voltage drop minimization unit after the current limiting unit in accordance with a predetermined delay.
申请公布号 US8074086(B1) 申请公布日期 2011.12.06
申请号 US20070953176 申请日期 2007.12.10
申请人 SANCHETI SANJAY KUMAR;NAYAK ANUP;GAO BO;CYPRESS SEMICONDUCTOR CORPORATION 发明人 SANCHETI SANJAY KUMAR;NAYAK ANUP;GAO BO
分类号 G06F1/26 主分类号 G06F1/26
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