发明名称 |
JUNCTION FIELD EFFECT TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ANALOG CIRCUIT |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a JFET capable of reducing influence of external noise. <P>SOLUTION: A JFET 50 comprises: a p-type semiconductor substrate 1; an n-type channel region 3 formed on a surface of the p-type semiconductor substrate 1; an n-type buried region 4 that is formed in the n-type channel region 3 and has a higher impurity density than that of the n-type channel region 3; a p-type gate region 6 formed on a surface of the n-type channel region 3; and an n-type drain/source region 7 and an n-type drain/source region 8 formed on the surface of the n-type channel region 3 so as to sandwich the p-type gate region 6. The n-type buried region 4 is formed under one of the n-type drain/source region 7 and the n-type drain/source region 8, but not under the other. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2011243708(A) |
申请公布日期 |
2011.12.01 |
申请号 |
JP20100113706 |
申请日期 |
2010.05.17 |
申请人 |
PANASONIC CORP |
发明人 |
MATSUNAGA TOMOHIRO;SANO KOICHIRO |
分类号 |
H01L21/337;H01L21/8232;H01L27/06;H01L29/417;H01L29/808 |
主分类号 |
H01L21/337 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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