发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To improve a package density by enhancing degrees of freedom of a chip layout in a semiconductor device. <P>SOLUTION: Performing reverse bonding in a layered manner by means of ball bonding enables wires in 2 directions to be formed on a pad 4a of a memory chip 4 to produce an equivalent effect to sequential stitch bonding of wedge bonding in ball bonding. This can enhance the degrees of freedom of a chip layout and a lead layout of a substrate 3 to improve the package density on the substrate in a chip lamination type-semiconductor device (memory card). <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011244022(A) 申请公布日期 2011.12.01
申请号 JP20110197574 申请日期 2011.09.09
申请人 RENESAS ELECTRONICS CORP 发明人 MUTO OSAYASU;KAWABE NAOKI;ONO HIROSHI;WADA TAMAKI
分类号 H01L25/065;H01L25/07;H01L25/18 主分类号 H01L25/065
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