| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a simple and inexpensive digital filter that can certainly remove noise. <P>SOLUTION: A digital filter comprises first and second synchronous type D flip-flop sections 1 and 2, and control logic sections 3 and 4. The first synchronous type D flip-flop section outputs an intermediate signal from a signal output part after synchronizing an external input signal inputted at a signal input part with a clock. The second synchronous type D flip-flop section outputs an output signal from a signal output part after synchronizing the intermediate signal with the clock. The control logic sections input the intermediate signal to the second synchronous type D flip-flop section as a true signal when a signal period of the external input signal inputted at the signal input part of the first synchronous type D flip-flop section is at least two or more clock periods, and cancels the intermediate signal when the signal period is less than two clock periods. <P>COPYRIGHT: (C)2012,JPO&INPIT |
