| 摘要 |
Disclosed is a memory system wherein a processing unit (30) inputs/outputs data of a plurality of memory circuits (10-0 to 10-3) thorough a memory bus (20-0), and a memory interface circuit (14) is connected to a control bus of the processing unit wherein the memory interface circuit (14) collects specification information of the plurality of memory circuits (10-0 to 10-3), and creates and stores common specification information. Thereby, the number of memory connections to the memory bus can be increased. Further, even if more pieces of memory are connected to the memory bus, the initialization process of the processing unit can be shortened. |
