发明名称 |
METHODS FOR FORMING NMOS EPI LAYERS |
摘要 |
NMOS transistors having controlled channel strain and junction resistance and methods for the fabrication of same are provided herein. In some embodiments, a method for forming an NMOS transistor may include (a) providing a substrate having a p-type silicon region; (b) depositing a silicon seed layer atop the p-type silicon region; (c) depositing a silicon-containing bulk layer comprising silicon, silicon and a lattice adjusting element or silicon and an n-type dopant atop the silicon seed layer; (d) implanting at least one of the lattice adjusting element or the n-type dopant which is absent from the silicon-containing bulk layer deposited in (c) into the silicon-containing bulk layer; and (e) annealing the silicon-containing bulk layer with an energy beam after implantation in (d). In some embodiments, the substrate may comprise a partially fabricated NMOS transistor device having a source/drain region defined therein. |
申请公布号 |
WO2011084575(A3) |
申请公布日期 |
2011.12.01 |
申请号 |
WO2010US60708 |
申请日期 |
2010.12.16 |
申请人 |
APPLIED MATERIALS, INC.;TAYLOR, MITCHELL C.;FELCH, SUSAN B. |
发明人 |
TAYLOR, MITCHELL C.;FELCH, SUSAN B. |
分类号 |
H01L21/336;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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地址 |
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