发明名称
摘要 <p>Disclosed is a voltage dividing circuit reducing effects of a parasitic capacitance and a wordline voltage generating circuit including that. The voltage dividing circuit according to an aspect of the present invention includes a first resistor, a plurality of second resistors, and a selection means. The first resistor is connected between an output voltage node and a dividing voltage node. The plurality of second resistors are connectable between the dividing voltage node and a ground. The second resistors are sequentially selected in response to a step control signal and connected to ground. In order to reduce the sum of a parasitic capacitance existing in the second resistors, the resistors are arranged in groups, and the selection means connects only that group that contains a selected resistor to the dividing voltage node.</p>
申请公布号 JP4824366(B2) 申请公布日期 2011.11.30
申请号 JP20050249923 申请日期 2005.08.30
申请人 发明人
分类号 G11C16/06;H03K19/00 主分类号 G11C16/06
代理机构 代理人
主权项
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