发明名称 Metallization structure over passivation layer for IC chip
摘要 A semiconductor chip suited for being electrically connected to a circuit element includes a line and a bump. The bump is connected to the line and is adapted to be electrically connected to the line. A plane that is horizontal to an active surface of the semiconductor chip is defined. The area that the connection region of the line and the bump is projected on the plane is larger than 30,000 square microns or has an extension distance larger than 500 microns.
申请公布号 US8067837(B2) 申请公布日期 2011.11.29
申请号 US20050157186 申请日期 2005.06.17
申请人 LIN MOU-SHIUNG;MEGICA CORPORATION 发明人 LIN MOU-SHIUNG
分类号 H01L23/48 主分类号 H01L23/48
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