发明名称 Power management of memory via wake/sleep cycles
摘要 A method of managing power states of memory modules while performing memory access operations is disclosed. Memory modules are in a power saving state until an access operation involving the module is to be performed. The module is placed in an operational mode, then the access operation is performed, then the module is returned to the power saving state. Apparatus and systems using the method are also disclosed and claimed.
申请公布号 US8068373(B1) 申请公布日期 2011.11.29
申请号 US20100911181 申请日期 2010.10.25
申请人 TOTOLOS, JR. GEORGE;WESTBROOK SCOTT M.;NETWORK APPLIANCE, INC. 发明人 TOTOLOS, JR. GEORGE;WESTBROOK SCOTT M.
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
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