发明名称 METHOD AND APPARATUS FOR REDUCING REDUNDANT DATA IN A LAYOUT DATA STRUCTURE
摘要 The method and apparatus in accordance with the present invention reduces the data size of a layout data structure by reducing the amount of electrically redundant interconnects within a bank of interconnects. Electrically redundant interconnects are the repetitive interconnects within a bank of interconnects which do not contribute to the understanding of the IC. Therefore, a number of these interconnects may be deleted from the banks in the layout data structure, provided that enough interconnects remain to maintain the electrical connectivity and the visual representation of the bank.
申请公布号 CA2516827(C) 申请公布日期 2011.11.29
申请号 CA20052516827 申请日期 2005.08.22
申请人 SEMICONDUCTOR INSIGHTS INC. 发明人 AITNOURI, ELMEHDI;KEYES, EDWARD;BEGG, STEPHEN;GONT, VAL;MCINTYRE, DALE;OUALI, MOHAMMED;ZAVADSKY, VYACHESLAV L.
分类号 G06F17/50 主分类号 G06F17/50
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