发明名称 |
METHOD TO CONTROL SOURCE/DRAIN STRESSOR PROFILES FOR STRESS ENGINEERING |
摘要 |
<p>METHOD TO CONTROL SOURCE/DRAIN STRESSOR PROFILES FOR STRESS ENGINEERINGAbstractAn example embodiment of a strained channel transistor structure comprises the following: a strained channel region comprising a first semiconductor material with a first natural lattice constant; a gate dielectric layer overlying the strained channel region; a gate electrode overlying the gate dielectric layer; and a source region and drain region oppositely adjacent to the strained channel region, one or both of the source region and drain region are comprised of a stressor region comprised of a second semiconductor material with a second natural lattice constant different from the first natural lattice constant; the stressor region has a graded concentration of a dopant impurity and/or of a stress inducing molecule. Another example embodiment is a process to form the graded impurity or stress inducing molecule stressor embedded S/D region, whereby the location/profile of the S/D stressor is not defined by the recess depth/profile.Fig.5</p> |
申请公布号 |
SG175644(A1) |
申请公布日期 |
2011.11.28 |
申请号 |
SG20110075819 |
申请日期 |
2007.02.06 |
申请人 |
GLOBALFOUNDRIES SINGAPORE PTE. LTD.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHONG YUNG FU;LUO ZHIJIONG;JUDSON ROBERT HOLT |
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