发明名称 METHOD OF MANUFACTURING SUPER-JUNCTION SEMICONDUCTOR DEVICE
摘要 A method of manufacturing a super-junction semiconductor device facilitates suppressing the shape change caused in the alignment mark in the upper epitaxial layer transferred from the alignment mark in the lower epitaxial layer to be small enough to detect the transferred alignment mark with a few additional steps, even if the epitaxial layer growth rate is high. Alignment mark groups, each formed of trenches including parallel linear planar patterns and used in any of the multiple epitaxial layer growth cycles, are formed collectively on a scribe line between semiconductor chip sections; and the mesa region width between the trenches in each alignment mark group indicated by the distance between the single-headed arrows, facing opposite to each other and drawn in alignment mark groups is set to be one fourth of the designed total epitaxial layer thickness at the end of each epitaxial layer growth cycle or longer.
申请公布号 US2011287617(A1) 申请公布日期 2011.11.24
申请号 US201113110426 申请日期 2011.05.18
申请人 KODAMA NAOKO;FUJI ELECTRIC CO., LTD. 发明人 KODAMA NAOKO
分类号 H01L21/266 主分类号 H01L21/266
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