发明名称 MOTION VECTOR GENERATION CIRCUIT AND MOTION VECTOR GENERATION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To shorten a processing time to be spent on a motion vector generation. <P>SOLUTION: First and second MV calculation sections 406a and 406b generate MVs of object blocks based on MVs of reference blocks, respectively. An analysis section 401 analyzes a macroblock type and a sub-macroblock type, and outputs an analysis result thereof. A distribution control section 402 determines a reference direction of each of partitions into which a basic macroblock is divided based on the analysis result of the analysis section 401, and when partitions referring to one frame are consecutive, a plurality of the consecutive partitions are distributed in the first MV calculation section 406a and the second MV calculation section 406b. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011239074(A) 申请公布日期 2011.11.24
申请号 JP20100107353 申请日期 2010.05.07
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 NAKAISHI HIDENORI
分类号 H04N19/50;H04N19/105;H04N19/134;H04N19/136;H04N19/139;H04N19/196;H04N19/423;H04N19/436;H04N19/46;H04N19/463;H04N19/503;H04N19/51;H04N19/513;H04N19/52;H04N19/57;H04N19/593;H04N19/61;H04N19/625;H04N19/70;H04N19/80;H04N19/91 主分类号 H04N19/50
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