| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce time required for estimating the power consumption of an LSI, thereby improving efficiency of design the LSI. <P>SOLUTION: An LSI design apparatus 10 is used together with a simulator 20 that executes simulation of an operation description 91 in which the operation of an LSI is written in order of processing, and a high-level synthesizer 30 that executes binding processing to assign variables in the operation description 91 to registers to generate a register transfer level description 95 on the basis of the binding result 94. The design apparatus 10 includes: an input part 11 into which a simulation result 93 of the simulator 20 and a binding result 94 of the high-level synthesizer 30 including the name of a variable for each clock cycle stored in the register are input; a calculation part 12 for calculating a rate of change per clock cycle of a variable stored in the register on the basis of the simulation result 93 and the binding result 94 input by the input part 11; and an estimation part 13 for estimating the power consumption of an LSI corresponding to the operation description 91 on the basis of the rate of change calculated by the calculation part 12. <P>COPYRIGHT: (C)2012,JPO&INPIT |
