发明名称 Method for fabricating a shallow and narrow trench FETand related structures
摘要 Disclosed is a method for fabricating a shallow and narrow trench field-effect transistor (trench FET). The method includes forming a trench within a semiconductor substrate of a first conductivity type, the trench including sidewalls and a bottom portion. The method further includes forming a substantially uniform gate dielectric in the trench, and forming a gate electrode within said trench and over said gate dielectric. The method also includes doping the semiconductor substrate to form a channel region of a second conductivity type after forming the trench. In one embodiment, the doping step is performed after forming the gate dielectric and after forming the gate electrode. In another embodiment, the doping step is performed after forming the gate dielectric, but prior to forming the gate electrode. Structures formed by the invention's method are also disclosed.
申请公布号 US2011284950(A1) 申请公布日期 2011.11.24
申请号 US20100800662 申请日期 2010.05.20
申请人 HENSON TIMOTHY D.;MA LING;BURKE HUGO;JONES DAVID P.;KELKAR KAPIL;RANJAN NIRAJ;INTERNATIONAL RECTIFIER CORPORATION 发明人 HENSON TIMOTHY D.;MA LING;BURKE HUGO;JONES DAVID P.;KELKAR KAPIL;RANJAN NIRAJ
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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