发明名称 SYSTEM AND METHOD FOR CORRECTING PHASE NOISE IN DIGITAL-TO-ANALOG CONVERTER OR ANALOG-TO-DIGITAL CONVERTER
摘要 A circuit includes a digital oscillator, a phase lock loop (PLL), a digital signal generator, a correction circuit and a digital-to-analog converter DAC (DAC). The digital oscillator can output a reference clock signal. The PLL can output a system clock signal based on the reference clock signal. The digital signal generator can output a digital signal based on the system clock signal. The correction circuit can output a pre-distorted signal based on the reference clock signal, the system clock signal and the digital signal. The DAC can output an analog signal based on the pre-distorted signal and the system clock signal.
申请公布号 US2011285433(A1) 申请公布日期 2011.11.24
申请号 US20100783290 申请日期 2010.05.19
申请人 HEZAR RAHMI;HAROUN BAHER 发明人 HEZAR RAHMI;HAROUN BAHER
分类号 H03L7/08 主分类号 H03L7/08
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