发明名称 CLOCK GENERATING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a clock generating circuit that is capable of generating a clock signal with small clock noise using a small-scale circuit. <P>SOLUTION: A clock generating circuit includes a first current generating circuit, a first voltage generating circuit, a first comparison circuit, a second current generating circuit, a second voltage generating circuit, a second comparison circuit, a clock output circuit, and a control circuit. The clock output circuit generates a clock signal whose phase changes in synchronization with timings at which first and second comparison results change. The control circuit generates a random number in synchronization with the clock signal and variably controls at least one of a first current, a second current, a first threshold value, and a second threshold voltage in accordance with the random number. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011239062(A) 申请公布日期 2011.11.24
申请号 JP20100107077 申请日期 2010.05.07
申请人 TOSHIBA CORP 发明人 NAKAGAWARA TOMOMASA
分类号 H03K5/156;G06F1/06 主分类号 H03K5/156
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