发明名称 Compact semiconductor package with integrated bypass capacitor and method
摘要 A top-side cooled compact semiconductor package with integrated bypass capacitor is disclosed. The top-side cooled compact semiconductor package includes a circuit substrate with terminal leads, numerous semiconductor dies bonded atop the circuit substrate, numerous elevation-adaptive interconnection plates for bonding and interconnecting top contact areas of the semiconductor dies with the circuit substrate, a first member of the elevation-adaptive interconnection plates has a first flat-top area and a second member of the elevation-adaptive interconnection plates has a second flat-top area in level with the first flat-top area, a bypass capacitor, having two capacitor terminals located at its ends, stacked atop the two interconnection plate members while being bonded thereto via the first flat-top area and the second flat-top area for a reduced interconnection parasitic impedance.
申请公布号 US8062932(B2) 申请公布日期 2011.11.22
申请号 US20080330381 申请日期 2008.12.08
申请人 ALPHA & OMEGA SEMICONDUCTOR, INC. 发明人 HEBERT FRANCOIS;LIU KAI
分类号 H01L21/00;H01L21/70 主分类号 H01L21/00
代理机构 代理人
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