发明名称 Substrate for semiconductor chip package And Method of manucfacturing the same
摘要 PURPOSE: A semiconductor chip package substrate and a method for manufacturing the same are provided to be matched with the solder resist layers of the upper unit type package area of the substrate by forming a lower solder resist layer in the lower unit type package area of the substrate. CONSTITUTION: A unit type package area includes an upper unit type package area(A) and a lower unit type package area(B). A circuit layer(20) includes an upper circuit layer(21) and a lower circuit layer(22). An upper sawing area(SA) is formed between spaces in the upper unit type package area. A lower sawing area(SB) includes a dam shaped solder resist layer(40). The solder resist layer is eliminated in the final separation process of a semiconductor package.
申请公布号 KR101084878(B1) 申请公布日期 2011.11.21
申请号 KR20090062645 申请日期 2009.07.09
申请人 发明人
分类号 H01L21/60;H01L23/48 主分类号 H01L21/60
代理机构 代理人
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