| 摘要 |
The present invention pertains to the technical field of A/D converter, to be more specific, a pipeline A/D converter and its single redundancy bit digital correction. The related single redundancy bit digital correction features the following steps: substages except for the last one quantizes input voltage, calculates the residual voltage, which is amplified and shifted to the middle part of the reference voltage range, and outputs to the following substage until the last one, which only quantizes the input voltage; The code and offset code of each substage, corresponding to the quantized thermometer code is calculated; the offset codes of all stages are added by weight to get total offset code; codes of all substages are added by weight, to which the total offset code is added. The comparator offset error is corrected to obtain an output code; the present invention released the A/D converter that applies the foregoing digital correction; the present invention is capable of reducing the number of substages of high speed and high resolution pipeline A/D converter and identifying the negative or positive overflows of input signals. |
