| 摘要 |
An apparatus includes a processor; a volatile, high-to-low working memory partition connected to the processor; a volatile, low-to-high working memory partition connected to the processor; a high-side, input/output section providing an interface to a high-side network or data bus, and configured to send messages to the high-to-low working memory, and to receive messages from the low-to-high working memory; a low-side, input/output section providing an interface to a low-side network or data bus, and configured to send messages to the low-to-high working memory, and to receive messages from the high-to-low working memory; a first non-volatile memory for storing a rule set binary image, whereby the processor controls the transfer of messages between the high-side input/output section and the low-side input/output section in accordance with the rule set; and a second non-volatile, memory for storing firmware for controlling executive functions of the apparatus. |
