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经营范围
发明名称
processo para codificar aritmeticamente um sinal de informação digital, e, aparelho para decodificar aritmeticamente um sinal de informação aritmeticamente codificado em um sinal de informação.
摘要
申请公布号
BR9904879(B1)
申请公布日期
2011.11.16
申请号
BR19990004879
申请日期
1999.02.22
申请人
发明人
RENATUS J. VAN DER VLEUTEN
分类号
H03M7/40
主分类号
H03M7/40
代理机构
代理人
主权项
地址
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